1. Technical Field
This invention relates in general to the protection of the front side surface of semiconductor wafers during the processes of backside grinding, transporting, and packaging.
2. Description of Prior Art
The following four U. S. patents relate to the protection of wafers and to the process of backside wafer grinding.
U.S. Pat. No. 5,632,667 issued May 27, 1997, to Michael R. Earl et. al. discloses a no coat backside wafer grinding process.
U.S. Pat. No. 5,888,838 issued Mar. 30, 1999, to Ronald Lee Mendelson et. al. discloses a process for preventing breakage during wafer backside grinding.
U.S. Pat. No. 6,071,184 issued Jun. 6, 2000, to David T. Anderson III discloses a process and apparatus for wafer backside grinding.
U.S. Pat. No. 5,331,772 issued Jul. 26, 1994, to Robert E. Steere III discloses a seal assembly used during wafer backside grinding.
The use of semiconductor devices in electronic products specifically portable ones such as laptop computers, digital cameras, cam-corders, as well as products for military use require highly dense circuitry. Volumetric density of circuits at the package level has become an important parameter. This demand has resulted in the requirement for thinner semiconductor chips. In order to meet this requirement, the semiconductor industry has incorporated wafer grinding to obtain the thinner chips or dies required.
In general, a semiconductor wafer is sliced from a crystal ingot at a thickness determined by the size of the wafer and the stresses the wafer will be subjected to during further processing. Semiconductor processes also require that the wafer remain relatively flat during processing so as to obtain acceptable product yields. To this end wafer thickness is chosen larger than required by the devices that are fabricated on them.
In order to obtain the volumetric densities required by the products, the wafers are thinned. This is accomplished by grinding material off the backside of the wafers after the necessary circuit patterns have been fabricated on the front side of the wafers. The grinding process, by its nature, results in contaminants such as silicon and/or grinding wheel residues being present and adhering to the active front side of the wafer. These unwanted contaminants result in yield loss of the wafers. To prevent the contamination the front of the wafers are covered by various means during the grinding process.
One of these methods is to utilize a dry film adhesive tape on the front side of the wafer of a thickness so as to cover any protrusions; i.e., solder bumps. This tape protects and also provides a planar surface for the grinding operation. An important drawback inherent to this process is the residue that results on the surface of the wafer after the adhesive dry film is removed.
The current process of wafer front side protection during grinding is shown in FIG. 1 and is the prior art. The wafer, item 10FIGS. 1a-1f, prior to grinding is shown with solder bumps 12 on the front side of the wafer. The dry film adhesive tape 14 is attached to the front side of the wafer as shown in 1b. The dry film is composed of a base film layer 16 and an adhesive tape layer 18 for adhesion to the wafer during the grinding operation. The wafer 18 is then ground to the desired thickness as shown in FIG. 1c. The adhesive tape 14 is then removed usually by a mechanical process; i.e., peeling. The resultant thin wafer 18 can possess the unwanted residual particles 20 from the adhesive.
The primary objective of the present invention is to provide a method for fabricating a protective structure to be used in the manufacture of semiconductor wafers. The purpose of this structure is to protect the active front side of the semiconductor wafers during the process of wafer grinding, transporting, and packaging.
Another objective of the present invention is to provide an easily removable protective structure.
An additional objective of the present invention is that the protective film have minimum residue upon removal.
It is also the objective of the present invention that the film fabrication process is compatible with the present fabrication methods.
The above objectives are achieved by the present invention as it provides a film structure and method for fabricating a protective layer of benzotriazole or benzimidazole as an organic passivation layer on the active front side of a semiconductor wafer. This organic passivation layer is applied to the active front side of the wafer prior to the application of an adhesive tape layer that is required for planarization and for securing the wafer during the wafer backside grinding process.
During the wafer backside grinding process the organic passivation layer and the adhesive tape layer protect the active front side of the wafer from silicon and grinding wheel particles. In addition, any protrusions on the front side of the wafer such as solder bumps are protected from oxidation.
After the wafer backside grinding is completed, the protective layers of the organic passivation and the adhesive tape are removed by subjecting the wafer to a heat treatment process at a temperature of 150xc2x0 C.-240xc2x0 C. At this temperature the organic passivation layer is vaporized and the adhesive layer can be easily removed.
An additional protective process is also described. This process utilizes an aqueous or organic material to protect the front side of semiconductor wafers that have microlens CMOS image sensors. This material is used to protect these devices during transport and packaging processes.